Technology

8 February 2007 - By the fourth quarter of 2006, Chartered had managed to push its break-even utilization rate down to 70 percent, compared with 75 percent in 2005, while in the midst of a less-than-favorable pricing environment. The CEO cited a range of factors behind the company's ability to squeeze more revenue out of its factories, including the improved economies of scale brought in by its 12-inch facility, Fab 7, and the fast pace of its ramp at the plant. The company's efforts to develop a "common platform" with partners IBM Corp. and Samsung were going "very well." The expected qualification of the companies' jointly developed 45-nanometer low-power process in late 2007 will be "another big new step in closing the technology gap," he said.

16 January 2007 - PCI-SIG today announced the availability of the PCI Express Base 2.0 specification. After a 60-day review of revision 0.9 of the specification in Fall 2006, members of the PCI-SIG finalized and released PCI Express (PCIe) 2.0, which doubles the interconnect bit rate from 2.5GT/s to 5GT/s to support high-bandwidth applications. The specification seamlessly extends the data rate to 5GT/s in a manner compatible with all existing PCIe 1.1 products currently supporting 2.5GT/s signaling. The key benefit of PCIe 2.0 is its faster signaling, effectively increasing the aggregate bandwidth of a 16-lane link to approximately 16 GB/s. The higher bandwidth will allow product designers to implement narrower interconnect links to achieve high performance while reducing cost.

22 December 2006 - AMD today announced the formation of a new Advanced Architecture and Technology Lab led by Rich Witek, AMD corporate fellow and chief architectural officer. The new lab will focus on technology and platform development beyond the five-year time horizon, further extending AMD's strong tradition of advanced silicon planning. AMD plans to gradually increase the staff to between 30 and 40 people. AMD is also looking into opportunities to open Advanced Architecture and Technology Labs in other global tech hubs.

12 December 2006 - Although TSMC reiterated that silicon-on-insulator (SOI) is a "niche" technology, overseas investors are now suggesting that the foundry is assessing the possibility of a bid for SOI-made CPU foundry orders on a 45nm design rule. SOI is generally applied to the production of CPU and graphics processors (GPUs) with only a few IDMs capable of producing on SOI technology due to the uniqueness of technology, higher cost and stiffer production barriers. 65nm, SOI volume production already started in the second half of 2006 with satisfactory feedback. UMC is already working on SOI development down to 45nm.

15 November 2006 - The NVIDIA Reality Tour showcases NVIDIA’s latest jaw-droppingly powerful, incredibly true-to-life PC gaming solutions on December 2nd and 3rd 2006 at Singapore's popular IT Mall,Funan DigitaLife Mall. Experience first-hand the ultimate in PC gaming, compete in head-to-head mini tournaments on the newest NVIDIA nForce and GeForce hardware, and win NVIDIA products and prizes. VR-Zone will be there to cover and showcase some of our works at this fun-filled event. Immerse yourself in our world. Don’t miss out on cutting-edge live demos running the latest NVIDIA technologies. Attend this event and receive an Exclusive Giveaway! Simply print out this page, bring it down to the Nvidia Reality Tour 06 at Funan DigitaLife Mall to exchange for an exclusive giveaway! There will be tons of NVIDIA giveaways plus mini 1:1 tournament gaming on cutting-edge PC hardware. See you guys there! Discuss about this event here!

10 November 2006 - TSMC recently confirmed reports that it will build two more 300mm wafer fabs at the Hsinchu Science Park and construction will begin in April next year. Fve new wafer fabs will be built at the park soon, including the two each planned by TSMC and PSC. TSMC announced that the company`s director board already approved the company`s US$1.13 billion capital expenditure plan for next year. The money will be mostly spent on expansions at its 300mm wafer fabs providing 65nm and 90nm processes.

17 October 2006 - Intel unveiled QuickData Technology at IDF Taipei today, a data acceleration engine that enables other networking and server vendors to increase the throughput of server data traffic. Key supporters of Intel QuickData Technology include Broadcom, Fujitsu-Siemens, IBM, Mellanox, Microsoft and VMWare. Introduced as part of I/OAT with Intel Xeon 5100 series earlier this year, the DEM (Data Movement Acceleration) engine in Intel' server and workstation platform chipsets are the foundation of Intel QuickData Technology. Intel has been working closely with Microsoft, the Linux community, VMware and several server vendors to optimize Intel QuickData Technology for the broadest range of OS and software environments.

17 October 2006 - AxisMobile PLC, the hi-tech specialists in consumer mobile email, today announces the Prosumer Version of its SimpleMail suite of services, including full PIM (address book and calendar) synchronisation with remote corporate servers such as Microsoft Exchange. SimpleMail is a full-featured email experience that includes attachment support, multiple account aggregation and utilisation of the device phone book. This Prosumer Version will allow network operators to offer low-cost Blackberry-like email solutions for small and medium enterprises (SMEs), and small offices, home offices (SOHOs). As the solution supports almost all handsets, mobile phone users need not purchase a dedicated device to enjoy these capabilities.

8 February 2007 - PCI-SIG today announced the availability of the PCI Express External Cabling 1.0 specification, which extends the PCI Express (PCIe®) interconnect architecture “outside the box.” Cables using the PCIe technology will be used for external applications, as well as applications internal to an enclosure that need a cable connection. Standard cables and connectors have been defined for x1, x4, x8, and x16 link widths. The new cabling specification currently supports signaling rates of 2.5GT/s. In the future, PCI-SIG expects to continue to advance the cabling technology by providing new enhancements and foresees support for 5.0GT/s (PCI Express 2.0) signaling rates.

8 January 2007 - At CES Las Vegas this week, Marvell will be showcasing a variety of enabling technologies and products for : -Digital Entertainment -Home Connectivity -Emerging Consumer Technologies -Cellular Handhelds The Marvell 88DE2710 converts PC graphics and high-definition (HD) and standard-definition (SD) digital video inputs into HD outputs, including full HD at 1080p with support for multiple frame rates, delivering luxury performance at mainstream price points. Targeted applications include Blu-ray and HD-DVD players and recorders, DTVs, HD set-top boxes, media clients, DTV docks for portable media players, etc.

13 December 2006 - IBM and AMD presented papers describing the use of immersion lithography, ultra-low-K interconnect dielectrics, and multiple enhanced transistor strain techniques for application to the 45nm microprocessor process generation. AMD and IBM expect the first 45nm products using immersion lithography and ultra-low-K interconnect dielectrics to be available in mid-2008. The continued enhancement of AMD and IBM's transistor strain techniques has enabled the continued scaling of transistor performance while overcoming industry-wide, geometry-related scaling issues associated with migrating to 45nm process technologies. In spite of the increased packing density of the 45nm generation transistors, IBM and AMD have demonstrated an 80 per cent increase in p-channel transistor drive current and a 24 per cent increase in n-channel transistor drive current compared to unstrained transistors. This achievement results in the highest CMOS performance reported to date in a 45nm process technology.

8 December 2006 - We have heard that Futuremark's 3D Mark 07 will be fully Quad-Core Optimized, even in the Game Tests. Users will gain more frame rates with a Quad Core Processor even in graphics tests. Current beta version seem to indicate that there are 3 Games Tests.

11 November 2006 - Intel is eyeing carbon nanotubes as a possible replacement for copper wires inside semiconductors, a switch that one day could eliminate some big problems for chipmakers. Intel has managed to create prototype interconnects--microscopic metallic wires inside of chips that link transistors--out of carbon nanotubes and measure how well the interconnects perform. In essence, the experiments are a way to test whether the theories about the properties of carbon nanotubes are accurate. Carbon nanotubes conduct electricity far better than metals and are also far thinner than metal interconnects can be made. IBM and others have made transistors out of carbon nanotubes. Carbon nanotube interconnects won't likely appear in a commercial chip for several years at best.

27 October 2006 - UMC projecting that revenue contribution from its 65nm production will surpass that from 90nm technology in 2007. With a 1% in revenue contribution reached with 65nm production last quarter, UMC has now four customers with 65nm projects at the pilot run stage, and ten more applications are expected to reach tape-out by year-end 2006. UMC has already started deploying 65nm technology at its Singapore 12-inch fab (UMCi), with yields similar to Taiwan fab's 90%. UMC schedules to start a pilot run on 55nm in the first half of 2007, and industry players generally associate Xilinx as the first company that adopts 55nm production.

17 October 2006 - VR-Zone was honored to be given the chance to interview Mr Shai Schiller, CEO of Axis Mobile at the 3GSM Conference held @ Suntec City, Singapore. Throughout the interview, we discussed the various trends that the consumer mobile market is heading, and Axis Mobile's Simple Mail mobile email application, a revolutionary application that will bring mobile email to the next level.

11 October 2006 - Toshiba has signed a license agreement for the Rambus XDR(TM) memory controller interface cell, dubbed XIO, and the Rambus PCI Express® Gen 1 PHY cell. The Rambus interface solutions will be implemented in Toshiba's 65nm process technology for integration into the latest consumer, computing, and communications applications. The Rambus XIO memory controller is the high-performance, low-latency interface to Rambus' XDR DRAM, today's fastest high-speed memory. Ideal for graphics-intensive applications in consumer electronics and computing, a single, 2-byte wide, 3.2 GHz XDR DRAM component provides 6.4 GB/sec of peak bandwidth.